module ysyx_22040213_memory_syn  (
	  input clk,
	  input rst,
	  input EXE_to_MEM_valid,
//	  input [63:0] mwdata,
	  input [63:0] maddr,
	  input [2:0]funct3,
	  input lm_en,
	  input sm_en,
	  output data_ok,
	  output addr_ok,
	  output reg [63:0] mrdata
);
	//wire size;
	import "DPI-C" function void mpmem_read(input longint raddr, output longint rdata);
	import "DPI-C" function void mpmem_write(input longint waddr, input longint wdata, input byte wmask);
	always @(*) begin
		if(lm_en)begin
			case(funct3)
			  3'b001 :
			    begin mpmem_read(maddr, o_mem_data); 
		                  o_mem_data = {{48{o_mem_data[15]}},o_mem_data[15:0]};
			    end
			  3'b010 :
			    begin mpmem_read(maddr, o_mem_data); 
		                  o_mem_data = {{32{o_mem_data[31]}},o_mem_data[31:0]};
			    end
			  3'b011 : mpmem_read(maddr, o_mem_data);
			  3'b100 :
			    begin mpmem_read(maddr, o_mem_data); //lbu
		                  o_mem_data = {{56{1'b0}},o_mem_data[7:0]};
			    end
			  3'b101 :
			    begin mpmem_read(maddr, o_mem_data); 
		                  o_mem_data = {{48{1'b0}},o_mem_data[15:0]};
			    end
		  	  default o_mem_data = 0;
			endcase
		end
		else if(sm_en)begin
			o_mem_data = 0;
			/*
			case(funct3)
				3'b000 : mpmem_write(maddr, mwdata, 8'h01);//sb
				3'b001 : mpmem_write(maddr, mwdata, 8'h03);//sh
				3'b010 : mpmem_write(maddr, mwdata, 8'h0f);//sw
				3'b011 : mpmem_write(maddr, mwdata, 8'hff);//sd 
				default : mpmem_write(maddr, mwdata, 8'b00000000);
			endcase	
			*/
		end
		else o_mem_data = 0;
	end
	reg [63:0] o_mem_data;
	assign data_ok = 1'b1;
	assign addr_ok = 1'b1;
	wire mem_en = lm_en || sm_en;
	wire mem_wr = lm_en ? 1'b0 : 1'b1;
       
	Reg #(64,64'h0) i0 (clk,rst,o_mem_data,mrdata, mem_en && !mem_wr && EXE_to_MEM_valid);
 endmodule
